TI Unveils Jacinto‑Powered ADAS & Gateway Processors Featuring Integrated Functional Safety MCU

In Las Vegas, Texas Instruments unveiled the TDA4VM ADAS and DRA829V gateway processors, built on its latest Jacinto platform to power mass‑market ADAS vehicles.

The launch reflects a broader industry shift, with major OEMs revisiting their original push for fully autonomous vehicles.

In a recent interview with EE Times, Curt Moore—general manager of Jacinto processors—explained that TI had to decide where to focus its next‑generation automotive processor strategy. ‘We’re designing auto‑grade chips that address edge, safety and security, while keeping semiconductor costs and accessibility low,’ he said.

Moore added that the goal is to create processors that are scalable for a wide range of vehicles—from low‑cost cars for younger or lower‑income drivers to higher‑end models.

ADAS and Gateway Processors

The TDA4VM is tailored for ADAS, whereas the DRA829V serves as a gateway system that meets all the ‘plumbing’ requirements of modern vehicles. Both chips feature on‑chip accelerators to accelerate data‑intensive workloads.

Crucially, each processor includes a functional‑safety microcontroller, enabling OEMs and Tier‑1 suppliers to support ASIL‑D safety‑critical functions and convenience features on a single chip.

Both processors also share a unified software platform, allowing developers to deploy the same code base across high‑end and low‑end vehicles.

TDA4VM ADAS processor: highly integrated, fusing multiple sensor inputs. (Source: TI)

The Right Level of Autonomy?

TI aims to enable the appropriate level of autonomy for new cars. While Level 4 and Level 5 vehicles remain in development, Moore highlighted the ‘corner cases’ that still challenge full autonomy and the need for clearly defined operational design domains.

‘The transition from Level 2 to higher levels will be gradual,’ he said. ‘We’re not abandoning higher‑level ADAS functions; the TDA4VM is designed for improved visibility at the speeds required for on‑chip analytics.’

Specifically, the TDA4VM supports high‑resolution 8‑MP cameras that can see farther, even in fog and rain, and can simultaneously run four to six 3‑MP cameras. Vice president Sameer Wasson added that the chip can fuse data from radar, LiDAR and ultrasonic sensors, enabling scalable yet practical automotive solutions.

With a power envelope of just 5–20 W, the TDA4VM eliminates the need for active cooling while delivering high‑performance ADAS operations.

Deep Learning Capabilities

The Jacinto platform enhances deep‑learning support, offering full programmability for OEMs and Tier‑1 partners who wish to develop their own vision, camera and sensor‑fusion algorithms.

While TI has yet to disclose detailed performance metrics for the TDA4VM’s deep‑learning engine, analysts note that the chip is positioned to compete with Intel/Mobileye’s EyeQ series, though direct comparisons remain challenging.

Software‑Defined Cars and OTA

TI also addresses the growing demand for secure over‑the‑air updates. ‘OTA isn’t feasible without an architecture that supports upgrades,’ Moore said. ‘A gateway processor or a legacy MCU alone isn’t sufficient.’

The DRA829V offers a significant leap forward, providing a PCIe switch on‑chip and an eight‑port gigabit TSN‑enabled Ethernet switch, enabling high‑performance computing and communications throughout the vehicle.

‘This is the first industry example of a gateway processor that integrates PCIe and GbE/TSN,’ Moore highlighted.

DRA829V gateway processor: first to integrate PCIe and GbE/TSN on chip. (Source: TI)

Availability

Samples of both the TDA4VM and DRA829V have been available to customers since May. Developers can start immediately with the Jacinto 7 development kits and purchase the TDA4VM XEVM and DRA829V XEVM evaluation modules for US$1,900 each on TI.com.

Pre‑production TDA4VM and DRA829V processors are available now from TI in 1,000‑unit lots for US$97. Volume production is expected in the second half of 2020.