Self‑Seeded MOCVD Synthesis of InGaAs/InP Core–Shell Nanowires: Superior Photoluminescence and Strain‑Controlled Growth

Background

III–V semiconductor nanowires are emerging as key components for next‑generation nanoscale electronics and photonics, thanks to their unique electronic, optical, and geometric properties. InGaAs nanowires, in particular, offer a tunable direct band‑gap, low effective mass, and high carrier mobility, making them attractive for photonic and optoelectronic applications. Integrating these materials onto Si platforms is especially compelling, as it combines the superior III–V physics with mature CMOS technology, while the nanowire geometry mitigates lattice‑mismatch challenges.

Despite these advantages, the high surface‑to‑volume ratio of nanowires introduces numerous surface states that degrade electronic and optical performance via scattering and non‑radiative recombination. For narrow‑gap III–V materials, surface‑state‑induced band bending can redistribute carriers and impair device operation. Surface passivation is therefore critical. InGaAs/InP core–shell structures are ideal: the type‑I band alignment confines carriers in the InGaAs core, and the InP shell, with an emission wavelength tunable between 1.31–1.55 µm, is well suited for fiber‑optic communications.

In this study, we grow and characterize InGaAs/InP core–shell nanowires on Si‑(111) using MOCVD. We show that lattice‑mismatch‑induced strain governs the shell growth, leading to asymmetric coverage and wire bending. By optimizing growth parameters, we achieve high‑quality core–shell nanowires with a dramatic 100‑fold PL enhancement, attributable to effective surface‑state suppression and carrier confinement.

Methods/Experimental

Nanowire Growth

The nanowires were fabricated in a close‑coupled shower‑head MOCVD reactor (AIXTRON Ltd., Germany) at 133 mbar. Trimethylindium (TMIn) and trimethylgallium (TMGa) served as the group‑III precursors, while arsine (AsH3) and phosphine (PH3) provided group‑V elements. High‑purity hydrogen (H2) flowed at 12 slm. Si‑(111) substrates were first annealed at 635 °C, then cooled to 400 °C under AsH3 to form a (111)B‑like surface. InGaAs cores were grown at 565 °C for 15 min, with TMIn and AsH3 fluxes of 0.8×10−6 mol min−1 and 1.0×10−4 mol min−1, respectively; the TMGa flux was varied to adjust the In/Ga ratio (Xv = 30–40 %). The InP shell was deposited at 565 °C for 10 min, using TMIn (2×10−6 mol min−1) and PH3 (8.0×10−4 mol min−1). Samples were cooled to room temperature in a PH3 atmosphere to prevent oxidation.

Characterization Methods

Nanowire morphology was examined by scanning electron microscopy (SEM, Nova Nano SEM 650) and transmission electron microscopy (TEM, JEM2010F, 200 kV). Energy‑dispersive spectroscopy (EDS) provided compositional mapping. TEM specimens were prepared by mechanical transfer onto carbon‑coated copper grids. Photoluminescence (PL) was measured using a 532 nm laser (≈100 mW, 150 µm spot) and a Fourier‑transform infrared (FTIR) spectrometer with a liquid‑nitrogen‑cooled InSb detector. The FTIR mirror operated in rapid‑scan mode.

Results and Discussion

Figure 1 illustrates the growth sequence of InGaAs/InP core–shell nanowires on Si‑(111). InGaAs nanowires nucleate via a self‑catalyzed mechanism; In droplets are consumed under AsH3, after which the AsH3 flow is switched to PH3 and TMIn is introduced to trigger InP overgrowth.

Schematic illustration of the growth of InGaAs/InP core–shell nanowires and the source‑supply sequences for the nanowire growth

SEM images (Figure 2) reveal that bare InGaAs nanowires are vertically aligned with uniform diameters. After InP shell deposition, the wires retain smooth side facets, indicating successful growth parameter optimization. The average diameter increases from ≈65 nm (bare core) to ≈95 nm (core–shell), implying a ≈15 nm InP shell. However, for Xv = 30 %, the wires bend due to strain from the lattice mismatch. Increasing Xv to 35 % reduces bending, and at Xv = 40 % the wires become straight, consistent with reduced lattice mismatch and increased core diameter.

a 30°‑tilted SEM images of the InGaAs nanowires, and InGaAs/InP core–shell nanowires with Xv, of b 30%, c 35%, and d 40%

TEM and EDS confirm the coherent InP shell without misfit dislocations (Figure 3). The InP adopts the mixed wurtzite/zinc‑blende crystal structure of the InGaAs core, inherited via epitaxial growth. EDS line scans (Figure 4) show that the InP shell is initially asymmetric for Xv = 30 % but becomes symmetric as Ga content increases, correlating with reduced bending.

a HRTEM image of the bare InGaAs nanowire (Xv = 35%) acquired from the 110 zone axis. The inset is the corresponding selected area electron diffraction (SAED) pattern. b Low‑magnification TEM image of an InGaAs/InP core–shell nanowire (Xv = 35%). c HRTEM image of the nanowire viewed from the 110 zone axis. The red dashed line indicates the interface between the core and the shell

a A low‑magnification TEM image of an InGaAs/InP (Xv = 30%) core–shell nanowire. b, c EDS line scans along the two red lines marked in a. d A low‑magnification TEM image of an InGaAs/InP (Xv = 35%) core–shell nanowire. e, f EDS line scans along the two red lines marked in (d)

Photoluminescence spectra (Figure 5) demonstrate a striking 100‑fold intensity increase for core–shell nanowires, with the emission peak shifting from ~0.73 eV (bare core) to ~0.78 eV (core–shell). The blue shift (~50 meV) is attributed to strain‑induced band‑gap widening and the elimination of surface‑state‑related emission. Core–shell structures also exhibit narrower full‑width‑at‑half‑maximum (FWHM), indicating reduced non‑radiative pathways.

PL spectra of bare InGaAs and InGaAs/InP (Xv = 30%) core–shell nanowires at 77 K. Inset is schematic illustration of the band structures of bare In-rich InGaAs and InGaAs/InP core–shell nanowires

Temperature‑dependent PL (Figure 6) shows that the core–shell emission remains intense up to room temperature, with peak wavelengths spanning 1.49–1.68 µm—well positioned for telecom applications. The expected red shift with temperature is partially suppressed below 60 K, likely due to carrier trapping in structural defects, a common phenomenon in nanowire ensembles.

a Normalized PL spectra of InGaAs/InP core–shell nanowires with different Xv (Xv = 30%, 35%, and 40%) at 77 K. b Temperature dependent PL spectra of InGaAs/InP core–shell nanowires with Xv = 40%. Inset in b shows corresponding temperature dependent shift in PL peak energy

Conclusions

We have demonstrated that self‑seeded MOCVD growth of InGaAs/InP core–shell nanowires on Si‑(111) yields structures with coherent interfaces, minimal defect density, and exceptional photoluminescence performance. Strain at the core–shell boundary dictates shell morphology, but appropriate Ga incorporation mitigates bending. The InP shell effectively passivates surface states and confines carriers, producing a ~100‑fold PL boost and enabling room‑temperature emission in the telecom window. These insights lay the groundwork for high‑performance, Si‑compatible optoelectronic devices based on InGaAs nanowires.

Abbreviations

BF

Bright–field

CMOS

Complementary metal‑oxide‑semiconductor

EDS

Energy‑dispersive spectroscopy

FTIR

Fourier transform infrared

FWHM

Full width at half maximum

LED

Light‑emitting diode

MOCVD

Metal‑organic chemical vapor deposition

PL

Photoluminescence

SAED

Selected area electron diffraction

SEM

Scanning electron microscopy

TEM

Transmission electron microscopy

TMGa

Trimethylgallium

TMIn

Trimethylindium

ZB

Zinc‑blende