Room‑Temperature ALD Al₂O₃ Enables Ultra‑Low‑Thermal‑Budget, High‑Mobility a‑IGZO Thin‑Film Transistors
Abstract
We demonstrate that a‑IGZO thin‑film transistors (TFTs) fabricated with an O₂ plasma‑enhanced ALD Al₂O₃ gate dielectric deposited at room temperature (RT) exhibit outstanding performance: a field‑effect mobility of 19.5 cm² V⁻¹ s⁻¹, a subthreshold swing (SS) of 160 mV dec⁻¹, a threshold voltage (V_T) of 0.1 V, an on/off ratio of 4.5 × 10⁸, and superior bias stability. The high mobility and low bias shift are attributed to the hydrogen‑rich Al₂O₃ layer, which passivates interfacial states and oxygen vacancies in the a‑IGZO channel, generating additional carriers. This approach delivers a zero‑thermal‑budget, high‑performance TFT that is ideal for flexible electronics.
Background
Amorphous In‑Ga‑Zn‑O (a‑IGZO) TFTs are prized for their high mobility, excellent uniformity, visible‑light transparency, and low‑temperature processability, making them a leading candidate for next‑generation displays, flexible devices, and wearables. For flexible substrates, the thermal budget must be minimized; therefore, researchers have explored room‑temperature gate dielectrics such as sputtering, solution processes, e‑beam evaporation, and anodization. However, these films typically contain high trap densities and strong interfacial scattering, limiting mobility, increasing SS, and reducing on/off ratios.
Atomic layer deposition (ALD) offers precise thickness control, large‑area uniformity, and low‑temperature processing. While ALD of SiO₂ requires 250 °C—above many polymer glass transition temperatures—Al₂O₃ can be deposited at RT. RT‑ALD Al₂O₃ is known to contain abundant hydrogen impurities, yet it has not been exploited as a gate insulator in a‑IGZO TFTs. This study fills that gap by demonstrating a‑IGZO TFTs with an RT‑ALD Al₂O₃ gate dielectric and uncovering the underlying mechanism.
Methods
Highly doped p‑type silicon wafers (≤0.0015 Ω cm) served as gate electrodes after RCA cleaning. A 40‑nm Al₂O₃ layer was deposited in a commercial ALD system using trimethylaluminum (TMA) and O₂ plasma, with a cycle of 0.1 s TMA pulse, 10 s N₂ purge, 8 s O₂ plasma pulse, and 10 s N₂ purge. TMA was held at 18 °C and O₂ flow at 150 sccm with 2500 W plasma power. A 40‑nm a‑IGZO film (In:Ga:Zn:O = 1:1:1:4) was then sputtered at 0.88 Pa, 48 sccm Ar, and 2 sccm O₂. Photolithography and wet etching defined the active region, followed by 30‑nm Ti/70‑nm Au source/drain contacts via electron‑beam evaporation and lift‑off. No post‑annealing was performed.
Device characteristics were measured with an Agilent B1500A analyzer in a dark box at room temperature. Bias‑stress stability was evaluated under negative and positive gate bias stresses. Depth profiles and chemical composition were examined by secondary ion mass spectrometry (SIMS) and X‑ray photoelectron spectroscopy (XPS), respectively.
Results and Discussion
Figure 1a shows the dielectric constant of Al₂O₃ deposited at RT, 100 °C, and 150 °C as a function of frequency. As the deposition temperature rises, the dielectric constant decreases (8.6 → 7.9 → 7.4 at 10 Hz), consistent with the reduction of hydrogen‑associated OH groups that enhance permittivity. Figure 1b illustrates leakage characteristics: RT‑Al₂O₃ displays the lowest leakage density (2.38 × 10⁻⁸ A cm⁻² at 2 MV cm⁻¹) and the highest breakdown field (5.3 MV cm⁻¹).
Transfer curves (Figure 2) reveal that the RT‑Al₂O₃ TFT outperforms its higher‑temperature counterparts: μ_FE = 19.5 cm² V⁻¹ s⁻¹, SS = 160 mV dec⁻¹, V_T = 0.1 V, and I_on/off = 4.5 × 10⁸. Devices with Al₂O₃ deposited at 100 °C and 150 °C show markedly lower on‑currents and degraded SS. Calculated interfacial trap densities (D_it) confirm that the RT device has D_it = 1.1 × 10¹² eV⁻¹ cm⁻², roughly half those of the higher‑temperature devices.
Bias‑stress tests (Figure 3) demonstrate exceptional stability: under –10 V for 40 min, the RT device exhibits a negligible V_T shift (–0.04 V), while the 150 °C device shifts by 12.1 V. Positive bias stress (10 V) yields a V_T shift of 1.47 V for the RT device versus 8.8 V and 12.1 V for the 100 °C and 150 °C devices, respectively. Storage stability (Figure 4) shows that the RT device retains its μ_FE and SS after 60 days at 30 °C and 20 % RH, even without a back‑channel passivation layer.
Table 1 compares the RT‑Al₂O₃ device to recent reports. It achieves near‑zero V_T, low SS, and high I_on/off with comparable mobility, outperforming devices using Ta₂O₅ or higher‑temperature Al₂O₃ dielectrics. The sole variable across the devices is the Al₂O₃ deposition temperature, underscoring the critical role of hydrogen content.
SIMS depth profiling (Figure 5a) shows that Al₂O₃ deposited at RT contains a higher hydrogen concentration, which is released during IGZO sputtering. This elevated H concentration in the IGZO layer (≈ 1.5 × 10²² cm⁻³ for RT vs. 8 × 10²¹ cm⁻³ for 150 °C) leads to more effective passivation of interfacial states and oxygen vacancies. XPS O 1s spectra (Figure 5b) reveal reduced oxygen‑vacancy peaks (O₂) in the IGZO channel for the RT device (6.8 % vs. 12.3 % for 150 °C), confirming that H₂O and OH groups generated during deposition compensate vacancies, creating shallow donor states (V_OH) that increase conductivity and improve bias stability.
Conclusions
We have shown that a‑IGZO TFTs fabricated with a hydrogen‑rich Al₂O₃ gate dielectric deposited by RT‑ALD achieve high mobility, low subthreshold swing, and robust bias stability—all without any post‑annealing. The superior performance stems from the abundant hydrogen released from the RT‑Al₂O₃ layer, which passivates interfacial states and oxygen vacancies, generating additional carriers in the IGZO channel. This zero‑thermal‑budget approach is highly compatible with flexible electronics and other applications requiring low‑temperature processing.
Nanomaterials
- Ultra‑Broadband Terahertz Polarization Control via Anisotropic Dielectric Metasurfaces
- High‑Performance SnSe Nanoflake Field‑Effect Transistors Featuring Low‑Resistance Gold Ohmic Contacts
- Low‑Resistivity UV‑Cured Inkjet‑Printed Silver Gate Electrode: A Fast, Low‑Temperature, High‑Adhesion Approach
- Low‑Temperature ALD of In₂O₃ Nanofilms for High‑Performance Thin‑Film Transistors
- Microwave Annealing Boosts Dielectric Performance of Al₂O₃/ZrO₂/Al₂O₃ MIM Capacitors
- Enhancing Thermal Diffusivity of Al₂O₃ Nanofluids Through Modulated Laser‑Induced Photothermal Fragmentation
- Sub‑10 nm InSe Field‑Effect Transistors Enabled by Novel Sandwiched Indium Ohmic Contacts: A Theoretical Study
- Voltage‑Polarity Dependent Programming of a‑IGZO TFT Memories with ALD ZnO Charge‑Trapping Layer
- Enhancing Triboelectric Energy Harvesting: A Comprehensive Review of Dielectric Polarization Techniques
- High-Mobility Germanium nMOSFETs Using ZrO₂ Gate Dielectric