Siemens Boosts Veloce System with Four New Products, Driving Seamless Hardware‑Assisted Verification

Siemens Digital Industries has expanded its Veloce hardware‑assisted verification ecosystem with four new tools that streamline and accelerate SoC design validation. The complete solution—virtual verification platform, hardware emulation, and FPGA prototyping—provides a unified workflow that reduces verification time and cost while maintaining high quality.

The newly introduced products are:

• Veloce HYCON (HYbrid CONfigurable) – a virtual‑platform‑enabled verification engine that supports complex hybrid emulation for SoC designs.
• Veloce Strato+ – an upgraded hardware emulator with a roadmap that scales to 15 billion gates, delivering the largest effective capacity in the market.
• Veloce Primo – an enterprise‑grade FPGA prototyping solution capable of supporting up to 320 FPGAs, designed to align closely with the Strato family.
• Veloce proFPGA – a modular desktop FPGA prototyping platform that scales from 40 M to 800 M gates using high‑end FPGAs such as Intel Stratix 10 GX 10M and Xilinx Virtex UltraScale+ VU19P.

Siemens positions the Veloce family as a cohesive verification methodology that prioritizes early execution of market‑specific workloads, real‑world benchmarks, and power‑performance analysis. By running customer‑built virtual SoC models and full firmware early in the cycle, engineers can gain deep visibility into hardware behavior at the lowest levels.

Designs validated on Veloce Strato+ are then seamlessly migrated to Veloce Primo for software‑hardware interface testing and application‑level validation at near‑system speeds. Because both platforms share the same RTL, virtual environment, and transactor models, verification collateral is fully reusable, ensuring a smooth transition across stages.

"As we enter the new semiconductor mega‑cycle, the era of software‑centric SoC design demands a dramatic shift in functional verification systems to meet emerging needs," said Ravi Subramanian, senior vice president and general manager, Siemens EDA. "The next‑generation Veloce platform, backed by a decade‑long roadmap, sets a new industry standard for integrated, scalable verification across computing, AI/ML, 5G, networking, and automotive domains."

Veloce Strato+ leverages Siemens’ proprietary Crystal 3+ 2.5D chip, boosting capacity by 1.5× over the original Strato and enabling 15 billion gates of emulation. The platform is already deployed by major customers such as AMD, which uses Veloce Strato and Strato+ to qualify its EPYC processor families, and SiPearl, a French startup developing the Rhea microprocessor for the European exascale supercomputer.

FPGA Prototyping

Veloce Primo brings enterprise‑grade FPGA prototyping to the same software ecosystem as the Strato series. Supporting both virtual (emulation offload) and in‑circuit emulation (ICE) modes, Primo delivers high performance while preserving accurate clock ratios, thereby reducing overall verification costs.

Arm’s senior director of design services, Tran Nguyen, praised the solution: "Veloce Primo helps Arm resolve design issues quickly, enabling our ecosystem to deliver high‑quality Arm‑based SoCs at an unprecedented pace."

Xilinx’s senior director of core vertical markets, Hanneke Krekels, noted the collaboration: "Our partnership with Siemens, coupled with the latest Virtex UltraScale+ VU19P device, brings unmatched scalability and capacity to the Veloce portfolio."

Veloce proFPGA, offered through an OEM partnership with Pro Design, extends the Veloce ecosystem to the desktop market. Its modular capacity—ranging from 40 M to 800 M gates—supports the most demanding AI/ML, 5G, and data‑center ASIC designs.

"The advanced technology in the proFPGA family delivers significant advantages for today’s high‑performance designs," said Gunnar Scholl, CEO of Pro Design. "Our collaboration with Siemens accelerates market penetration and brings world‑class prototyping to a broader audience."