Synopsys Unveils PrimeSim Continuum: A Unified Simulation Platform for Hyper‑Converged IC Design

As chip design grows ever more intricate, diverse components and technologies converge into hyper‑convergent integrated circuits (ICs). Managing this complexity requires a single, cohesive analysis framework. Synopsys meets that need with PrimeSim Continuum, a unified circuit simulation workflow that addresses both the scale and heterogeneity of modern memory, AI, automotive, and 5G chips.

Premiered at the SNUG World international user conference, PrimeSim Continuum bundles four high‑performance engines—PrimeSim SPICE, PrimeSim Pro, PrimeSim HSPICE, and PrimeSim XA—into one seamless environment. The platform delivers comprehensive analysis, boosts productivity, and simplifies use, forming the cornerstone of Synopsys’ custom design suite.

Today’s systems‑on‑chip (SoCs) integrate a spectrum of components—from large, high‑speed embedded memories and analog front‑ends to complex I/O circuits operating at 100 Gb+ data rates—all within a single die or package. These elements, often fabricated on different process nodes or stacked in 2.5D/3D configurations, add layers of design and verification complexity.

Advanced technology nodes amplify parasitics, process variability, and margin reductions, demanding more simulations, longer runtimes, and higher precision. The resulting cost and time overhead can impede time‑to‑market and quality.

"To address this, you need a system of simulation engines with a unified workflow. No single SPICE simulator currently handles everything," said Hany Elhak, Synopsys’ Group Director of Product Management. “PrimeSim Continuum tackles both systemic and scale complexity with sign‑off‑quality engines tuned for analog, mixed‑signal, RF, custom digital, and memory designs.”

Leveraging next‑generation SPICE and FastSPICE architectures and heterogeneous CPU/GPU computing, PrimeSim Continuum optimizes resource use, shortening simulation times and reducing costs while maintaining gold‑standard accuracy.

High‑Bandwidth Memory: A Case Study

High‑bandwidth memory (HBM) exemplifies the need for integrated simulation. HBM stacks multiple DRAM dies atop an SoC in a 3DIC or SiP, linked by through‑silicon vias (TSVs) and microbumps on an interposer. Verification must span the entire memory subsystem, performing multidimensional analysis at both component and subsystem levels.

Key simulation requirements include:

• Cross‑technology analysis (logic, analog, memory, I/O)
• Multiple analysis types (analog, digital, mixed‑signal)
• Large‑scale subsystem and chip‑level modeling
• Advanced reliability studies (electrical, thermal, electro‑thermal, temporal)
• Signal integrity assessment
• Process and structural variability analysis

As nodes shrink, the volume of simulations spikes to meet reliability and yield targets, demanding precise signal‑integrity modeling across interposers and robust handling of electro‑thermal stresses and parasitics.

Design enablement thus demands workflows that converge power, performance, area (PPA), and cost objectives.

"PrimeSim Continuum represents a revolutionary breakthrough in circuit simulation innovation with heterogeneous compute acceleration on GPU/CPU, setting a new bar for EDA solutions," said Sassine Ghazi, Synopsys COO. "Our customers benefit from years of R&D and partnership‑driven innovation built into PrimeSim Continuum’s next‑generation technologies, complementing our modern custom design platform and Verification Continuum."

Elhak highlighted Kioxia as an early adopter, noting the company’s flash memory designs integrate complex systems—memory, analog, mixed‑signal, and custom digital blocks—that require distinct design and sign‑off technologies.

Shigeo (Jeff) Ohshima, Kioxia’s SSD Application Engineering Tech Executive, remarked, “A converged workflow around a common circuit simulation solution is needed to meet our time‑to‑results and cost targets. PrimeSim Continuum’s all‑in‑one solution delivers accuracy, speed, and capacity for our complex designs. The PrimeWave environment provides a unified workflow across all simulation disciplines, enabling seamless sign‑off of Kioxia’s memory designs. Effective collaboration and access to next‑generation technologies are fundamental to our partnership with Synopsys.”

PrimeSim Pro for Performance Acceleration

PrimeSim Pro, a core component of PrimeSim Continuum, is a next‑generation FastSPICE architecture that delivers fast, high‑capacity analysis for modern DRAM and Flash memory designs. Continued scaling of memory architecture has led to larger, more complex designs that demand greater simulation performance and capacity.

Jung Yun Choi, Corporate Vice President of the Memory Design Technology Team at Samsung Electronics, noted, “PrimeSim Pro can deliver up to 5× performance acceleration on our full‑chip power delivery network designs. Its next‑gen architecture keeps pace with advanced memory capacities, helping us meet aggressive time‑to‑results targets.”

NVIDIA Partnership

PrimeSim SPICE’s next‑generation architecture leverages NVIDIA’s GPU technology to provide the performance needed for comprehensive analog and RF analysis while maintaining sign‑off accuracy.

Edward Lee, Vice President of Mixed‑Signal Design at NVIDIA, said, “As modern compute workloads evolve, the size and complexity of analog designs have moved beyond the capacity of traditional simulators. NVIDIA GPUs enable PrimeSim SPICE to accelerate circuit simulation, reducing sign‑off time of analog blocks from days to hours.”

Jaehong Park, Executive Vice President and Head of Foundry Design Platform Development at Samsung Electronics, added, “Synopsys PrimeSim Continuum’s unified workflow delivered a 10× speed‑up with golden SPICE accuracy for our recent 56 Gbps Ethernet design, cutting verification from days to hours.”

Unified Workflow for Analysis and Sign‑off

PrimeSim Continuum integrates PrimeSim SPICE, PrimeSim Pro, PrimeSim HSPICE (the gold‑standard for foundation IP and signal integrity), and PrimeSim XA (FastSPICE for SRAM and mixed‑signal verification). PrimeWave offers a consistent, flexible environment across all engines, optimizing design setup, analysis, and post‑processing for a streamlined sign‑off experience.