How the Third Era of 32/64‑bit Embedded CPUs Is Reshaping the Industry

The first two eras of 32/64‑bit embedded processors were defined by proprietary architectures. The third era is moving away from that model.

First Era (1980s‑1990s)
Semiconductor companies built and maintained their own CPU designs, creating a fragmented landscape. The cost of keeping these architectures alive grew, and third‑party software vendors—citing expense, complexity, and return on investment—were reluctant to support multiple unique cores. This pressure pushed many firms to abandon their in‑house designs and instead license proven processor IP.

Second Era (late 1990s‑2000s)
Licensing became the norm. Leaders like Arm, ARC, Andes, MIPS, and Tensilica offered core licenses. Arm’s model allowed customers to create custom implementations based on its blueprints, leading to widespread adoption. Over time, Arm’s ecosystem attracted the majority of third‑party software and tools, cementing its dominance.

Despite the benefits, license fees rose sharply. Engineers could adopt Arm cores without penalty, but executives began to balk at the escalating costs. With no credible third‑party alternative, the market remained largely locked into a single vendor until the onset of the third era.

Third Era (2010‑present)
The industry is shifting toward open‑source, standards‑based architectures. RISC‑V leads this transformation, offering a vendor‑agnostic platform that enables designers to source cores from multiple providers. This flexibility lowers the risk of supply‑chain lock‑in and helps keep licensing and royalty costs competitive—critical in an era of tight margins and high OEM concentration.

RISC‑V vendors can differentiate on performance, size, power, custom features, and reliability, creating true value beyond a generic core. Meanwhile, Arm’s response has mixed messaging—initially attempting to sow doubt about RISC‑V, then waiting to see if startups falter. Surprisingly, RISC‑V has attracted significant venture capital, including backing from companies like Western Digital, and has carved out a foothold in low‑end markets where Arm’s pricing pressure was pushing customers away.

The stakes are high. A de‑facto monopoly rarely dissolves overnight, but the fault lines are widening. Customers are evaluating each project individually, and Arm’s reputation for execution is now challenged by an increasingly competitive, standards‑driven landscape.

For RISC‑V vendors, survival will hinge on more than a single IP core. Success will come from offering integrated, pre‑verified subsystems—combining high‑value hardware IP, middleware, and applications—to solve complex, application‑specific problems. Such differentiation can command premium royalties, but it requires a robust portfolio of patents and proven delivery.

Ultimately, dominant players fade as new demands arise. RISC‑V startups must demonstrate clear, unique value propositions—whether in AI, security, or other emerging domains—to encourage adoption beyond low‑end use cases. The question for them is not just “what can we offer,” but “how do we create lasting differentiation?”

▶ This article was originally published on our sister site, EE Times.