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Arm Introduces Cortex‑M55 & Ethos‑U55: New IP Cores Empowering TinyML on Low‑Power Endpoints

Arm today launched two cutting‑edge IP cores that bring advanced machine‑learning capability to resource‑constrained endpoints, including IoT and low‑power devices. The Cortex‑M55 microcontroller is the first to integrate Arm’s Helium vector‑processing engine, while the Ethos‑U55 is a compact version of Arm’s flagship Ethos NPUs. Though engineered for joint deployment, each core can operate independently.

Deploying AI on microcontrollers—commonly referred to as TinyML—has become increasingly critical as 5G networks spur intelligence at the edge. Experts forecast the TinyML market will expand to encompass billions of consumer and industrial systems, delivering real‑time insights without cloud reliance.

"When we look back five years from now, we may all agree that this time marked a true paradigm change in computing," said Thomas Ensergueix, senior director for IoT and Embedded, Arm. "We have seen within a few years how AI has revolutionized how data analytics runs in the cloud, most of us have an AI‑augmented smartphone in our pockets, and now here is the next step, getting ready for AI everywhere."

Arm Introduces Cortex‑M55 & Ethos‑U55: New IP Cores Empowering TinyML on Low‑Power Endpoints
Smart home devices such as smart speakers will increasingly be able to perform machine learning inference themselves (Image: Sebastian Scholz/Unsplash)

Voice recognition, computer vision, and other ML workloads are shifting from the cloud to the microcontroller itself. Arm’s new cores target a growing ecosystem of microcontroller solutions that prioritize on‑device inference.

"We know all this data at the endpoint level cannot go back to the cloud," said Ensergueix. "Video cameras in the home or smart city create literally gigabytes a day of data and the infrastructure is not built for this upstream dataflow. We are convinced that what we need to scale towards billions or trillions of IoT endpoints, we will need AI inferencing capability directly in the IoT endpoint. And it needs to be secure."

Cortex‑M55

The Cortex‑M55 builds on the trusted Cortex‑M family, offering the highest AI performance to date. Leveraging Armv8.1‑M architecture, it supports custom instructions that allow developers to tailor the core for specific workloads, squeezing maximum efficiency.

Helium vector processing technology delivers 5× faster DSP and 15× faster ML performance over previous Cortex‑M generations.

Custom instructions for INT8 operations, including dot product, accelerate neural‑network inference.

"A successful AIoT application depends on not only good compute performance but also being able to get the right data, the right coefficients and the right machine learning weights at the right time, so the memory interface of the processor has been optimized to be able to handle all the data in and out. It’s much more capable than any other Cortex‑M core on this aspect," said Ensergueix.

Arm Introduces Cortex‑M55 & Ethos‑U55: New IP Cores Empowering TinyML on Low‑Power Endpoints
The combination of Cortex‑M55 and Ethos‑U55 has enough processing power for applications such as gesture recognition, biometrics and speech recognition (Image: Arm)

Ethos‑U55

The Ethos‑U55 is Arm’s first ‘micro‑NPU’, delivering up to 0.5 TOPS of acceleration at 1 GHz. Configurable from 32 to 256 MACs, it features an on‑chip weight decoder and DMA for real‑time weight decompression, reducing memory footprint.

Compared to its larger siblings—Ethos‑N77 (4 TOPS), N57 (2 TOPS) and N37 (1 TOPS)—the U55 offers a dense, low‑power solution that can be scaled by stacking multiple cores.

Arm Introduces Cortex‑M55 & Ethos‑U55: New IP Cores Empowering TinyML on Low‑Power Endpoints
The Cortex‑M55 and Ethos‑U55 are designed to be used together, but can be used separately as well (Image: Arm)

The two new cores, M55 and U55, are engineered to work in tandem, delivering up to 480× speed‑ups over any previous Cortex‑M device alone. For typical voice‑assistant workloads, Arm reports a 50× acceleration and a 25× improvement in power efficiency compared to a Cortex‑M7.

"The Cortex‑M runs the application system code and then, when a neural‑network workload is required, the command stream is placed in SRAM, an interrupt is issued to the U55, and it takes over. The U55 runs to completion, returns results to SRAM, and then the Cortex‑M resumes control. In streaming scenarios, the U55 can process continuous audio or video data," explained Steve Roddy, vice president of the machine‑learning group at Arm.

Silicon based on these new cores should hit the market in early 2021.

 

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