Achronix eFPGA Custom Blocks: Powering Ultra‑Fast Data Systems
For more than a decade, I’ve followed Achronix’s evolution—from pioneering asynchronous FPGA fabrics to today’s cutting‑edge embedded solutions that deliver performance rivaling a 2‑GHz synchronous device, yet with a far broader range of applications.
In 2013 Achronix launched the Speedster family of high‑performance, high‑density standalone FPGAs, targeting specialized workloads. Three years later the Speedcore portfolio expanded to include Speedcore, a high‑performance embedded FPGA (eFPGA) that can be integrated directly into a System‑on‑Chip (SoC). This integration delivers superior performance while dramatically reducing power consumption compared with a standalone FPGA paired with a processor.

(Source: Achronix)
Speedcore offers a library of pre‑defined blocks—Logic, DSP, BRAM, and LRAM—organized in columns. Developers can customize the fabric’s height (number of blocks per column), width (number of columns), and mix (distribution of block types). This flexibility lets designers tailor the silicon to the exact mix of logic, DSP, and memory needed for a given workload.

Speedcore blocks (Source: Achronix)
In the same way that software engineers profile code to pinpoint bottlenecks, Achronix provides a mechanism for hardware designers to identify and harden recurring performance or area constraints. The result is a custom block that can be integrated into the Speedcore fabric as if it were a native block.

Developers can specify the “mix” of the Speedcore fabric (Source: Achronix)
A prime illustration of this capability is the YOLO (You Only Look Once) object‑recognition kernel used in real‑time detection systems. By hardening the matrix‑multiplication routine into a Speedcore custom block, Achronix achieved a substantial die‑size reduction while preserving peak performance.

Die size reduction of an AI convolutional network (Source: Achronix)
The Achronix ACE design suite fully supports the entire custom‑block workflow—from design capture to bitstream generation and system debugging. ACE’s GUI for each custom block enforces configuration rules, while its timing engine guarantees that every configuration meets stringent performance targets. The SnapShot embedded logic analyzer further empowers designers to set complex triggers and observe runtime signals within Speedcore devices.
To learn more about Speedster, Speedcore, and Speedcore custom blocks, visit the Achronix website.
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