Graphene‑Based Nanoscale Vacuum‑Channel Transistor: Fabrication, Performance, and Future Outlook

Abstract

We present the successful fabrication and comprehensive electrical evaluation of a graphene‑based nanoscale vacuum‑channel transistor (NVCT). Using standard electron‑beam lithography, a 90‑nm vacuum nanogap was precisely defined, while ultrasonic cleaning and thermal annealing effectively removed surface damage and adhesive residues from the graphene. In‑situ measurements conducted inside a scanning electron microscope (SEM) vacuum chamber demonstrate that the NVCT can be reliably switched from an off‑state to an on‑state by modulating the gate voltage. The device achieves an on/off current ratio of up to 10² with operating voltages below 20 V and leakage currents under 0.5 nA. These results illustrate the potential of NVCTs for high‑speed, low‑power nanoelectronic applications.

Background

As silicon‑based technology approaches its physical limits, researchers are increasingly exploring low‑dimensional materials and novel nanostructures to sustain the momentum of Moore’s law. Among these, nanoscale vacuum‑channel transistors (NVCTs) have emerged as a compelling alternative to conventional field‑effect transistors (FETs). Unlike solid‑state devices, electrons can traverse a vacuum nanogap ballistically, avoiding phonon scattering and thereby enabling higher carrier velocities and faster switching speeds.

While early vacuum tubes suffered from high power consumption and poor scalability, modern NVCT designs—particularly planar structures fabricated with electron‑beam lithography, focused ion beam, or nano‑imprinting—offer a pathway toward CMOS compatibility. Prior work has demonstrated back‑gate NVCTs with sub‑50‑nm channels that maintain high‑frequency performance even under ionizing radiation and elevated temperatures. Graphene, with its exceptional electrical conductivity and mechanical robustness, further enhances the prospects of NVCTs by providing a defect‑free, single‑atom‑thick channel that can sustain high current densities.

In this study, we leverage a refined wet‑transfer protocol and standard lithographic techniques to realize a graphene‑based NVCT featuring a 90‑nm vacuum channel. We evaluate its electrical characteristics, including output and transfer curves, leakage behavior, and operational stability under varying vacuum conditions, thereby establishing a benchmark for future device optimization.

Methods

Wet Transfer of Graphene

Large‑area graphene was grown on copper foils by thermal chemical vapor deposition (CVD) at 1,020 °C using methane (20 sccm) and hydrogen (40 sccm). A poly(methyl methacrylate) (PMMA) support layer was spin‑coated onto the graphene and baked at 100 °C for 5 min to solidify the film. The copper substrate was etched in a 1:1:1 solution of FeCl₃, HCl, and H₂O for 90 min. The PMMA/graphene stack was then transferred to deionized water and rinsed multiple times to eliminate etchant residues.

To mitigate wrinkles and cracks, the graphene/PMMA film was placed on a 2 cm × 2 cm SiO₂/Si substrate and subjected to a 1‑h ultrasonic bath (100 W, 50 Hz). This step improves substrate hydrophilicity and surface flatness, enabling continuous transfer of the graphene membrane. Finally, the sample was immersed in acetone for 1 h to remove the PMMA support. Post‑transfer, the graphene/SiO₂/Si wafer was annealed in a reducing atmosphere (Ar/H₂ = 100/40 sccm) at 300 °C for 3 h to eliminate residual organic contaminants.

Raman spectroscopy (514 nm excitation) confirmed the high quality of the transferred graphene, exhibiting a negligible D peak at 1,349 cm⁻¹, G and 2D peaks at 1,587 and 2,685 cm⁻¹, and a 2D/G intensity ratio of 2.19, indicative of single‑layer graphene.

Processes for chemical transfer of graphene w/o annealing in reducing atmosphere. The insets are the optical photographs of graphene transferred on SiO₂/Si substrate with (right) or without (left) annealing, respectively

Optical photograph of a 2 × 2 cm² graphene on SiO₂/Si substrate (a). SEM image of the transferred graphene (b). Typical Raman spectrum showing the basic features of graphene (c)

Fabrication of the Graphene‑Based NVCT

After depositing a 100‑nm SiO₂ layer by plasma‑enhanced chemical vapor deposition (PECVD), the graphene was transferred onto the wafer. Gold contacts (5 nm Cr / 80 nm Au) were defined by electron‑beam evaporation followed by a lift‑off process. A 90‑nm vacuum channel was patterned by electron‑beam lithography (Vistec, EBPG 5000plus ES) and oxygen plasma etching, which cuts the graphene sheet into two halves. Subsequent cleaning with acetone, isopropyl alcohol, and deionized water removed resist residues. A final annealing step (300 °C, 1 h, H₂/Ar = 40/100 sccm) improved device reliability.

Schematic diagram of the fabrication process of the graphene‑based nanoscale vacuum‑channel transistor

SEM image of graphene‑based NVCT with Au contacts (a). A zoom‑in of the ~90 nm vacuum channel (b)

Results and Discussion

Electron transport was investigated by in‑situ field‑emission measurements inside an SEM vacuum chamber (~10⁻⁴ Pa). A tungsten microtip, connected to a Keithley 2400 source‑meter, applied a voltage sweep (0.1 V steps) between the separated graphene halves while a 10 µA current limit prevented device damage. The measurements confirm that electrons are emitted laterally from the graphene edges and traverse the 90‑nm vacuum gap.

In‑situ field‑emission measurement of the graphene‑based vacuum nano‑channel transistor (a). Band diagram of graphene‑based NVCT at V_g < V_threshold and V_g > V_threshold (b, c)

The band diagrams illustrate how the back‑gate voltage modulates the vacuum barrier. Below the threshold voltage, the barrier is too wide for field tunneling, and electrons are trapped by surface impurities. Above threshold, the barrier narrows, enabling Fowler–Nordheim tunneling and switching the device into the on‑state. The gate also shifts the Fermi level of graphene, increasing the surface electron density and further enhancing emission.

Output (V_c vs. I_c) and transfer (V_g vs. I_c) characteristics reveal classic FET behavior. With V_g from 0 to 15 V, the collector current remains negligible until a threshold of ~6 V is reached; thereafter it rises exponentially with V_c. The on/off ratio exceeds 10², surpassing intrinsic graphene FETs that lack a bandgap. Leakage currents were below 0.5 nA, thanks to the 100‑nm SiO₂ insulator. Stability tests at ~10⁻⁴ Pa showed no degradation over extended operation, whereas a modest current drop was observed in 10⁻¹ Pa, likely due to Joule‑induced surface damage.

The output characteristics with V_g from 0 to 15 V (a). The transfer characteristics shows an on/off ratio exceeding 10² (b). Leakage current of graphene‑based NVCT (c). Stability test at different vacuum degrees (d). The inset shows the surface geometry changes after stable testing

Table 1 compares our graphene‑based NVCT with other nanoscale vacuum‑channel transistors. While silicon‑based devices exhibit higher on/off ratios and currents, the graphene NVCT offers markedly lower gate currents and a remarkably thin, scalable channel—advantages that can be amplified through further structural optimization.

Conclusion

We have demonstrated a graphene‑based NVCT fabricated entirely with CMOS‑compatible processes. The device features a 90‑nm vacuum channel, on/off ratios above 10², operating voltages below 20 V, and leakage currents under 0.5 nA. These metrics confirm the feasibility of graphene NVCTs for high‑speed, low‑power nanoelectronics. Future work will focus on reducing the channel width, exploring high‑k gate dielectrics, and improving long‑term reliability to fully unlock the potential of vacuum‑channel technology.

Abbreviations

CVD:

Chemical vapor deposition

EBL:

Electron beam lithography

FET:

Field‑effect transistor

FIB:

Focused ion beam

IC:

Integrated circuit

NVCT:

Nanoscale vacuum‑channel transistor

PECVD:

Plasma‑enhanced chemical vapor deposition

PMMA:

Polymethyl methacrylate

SEM:

Scanning electron microscope