Common‑Source Amplifier (IGFET): Design, Biasing, and Performance

Common‑Source Amplifier (IGFET)

The common‑source (CS) stage is the workhorse of MOSFET (IGFET) amplifier design. It delivers the highest voltage gain among the three basic MOSFET topologies, making it ideal for audio, RF, and mixed‑signal applications.

Key Characteristics

• Voltage Gain (Av) ≈ –g_m·R_out (typically 20–50 V/V)
• Input Impedance – very high (megaohms to gigaohms)
• Output Impedance – low (hundreds of ohms to a few kilohms)
• Bandwidth – limited by the Miller effect and parasitic capacitances

Biasing & DC Operating Point

Proper biasing ensures operation in the saturation region, where the MOSFET behaves like a voltage‑controlled current source. Common bias schemes include:

• Resistive divider with a source degeneration resistor for linearity and bias stability.
• Self‑bias using a diode‑connected MOSFET to set V_GS automatically.
• Voltage‑mode biasing with a reference voltage and current‑mirror load for precision.

Load Choices

Three typical load configurations are used to trade off gain, output swing, and linearity:

• Resistive load – simple, but limited by power dissipation.
• Current‑mirror load – doubles the effective load resistance, boosting gain.
• CMOS load (p‑MOS + n‑MOS) – provides high output swing and low distortion.

Frequency Response

The Miller capacitance (C_gs·(1 – Av)) dramatically reduces the high‑frequency bandwidth. Techniques to mitigate this include:

• Using a low‑capacitance transistor (e.g., JFET or low‑C_gs CMOS).
• Adding a feedback resistor between drain and source.
• Employing a cascode stage to isolate C_gs from the output.

Practical Design Example

# Parameters
VDD = 5.0 V
Rsource = 1 kΩ
Rd = 10 kΩ
M1 = N-channel MOSFET (Vth = 1.5 V)

# Bias calculation
VGS = VDD – ID·(Rd + Rsource)
# Choose ID = 2 mA → VGS ≈ 3.0 V

# Gain
gm = 2·ID / (VGS – Vth) ≈ 1.33 mS
Av ≈ –gm·(Rd || ro) ≈ –12 V/V

Applications

• Audio preamplifiers – high gain, moderate bandwidth.
• RF mixers – linearity and low noise figure.
• Digital logic level shifting – high input impedance.

By mastering biasing, load selection, and Miller effect mitigation, designers can harness the common‑source amplifier’s full potential for a wide array of electronic circuits.