Common‑Gate IGFET Amplifier: Theory, Design, and Practical Applications

Common‑Gate IGFET Amplifier

The common‑gate (CG) configuration is a fundamental building block in high‑frequency analog design. With the source terminal tied to the input signal and the gate held at a fixed bias, the device delivers a near‑unity voltage gain and exceptionally low input impedance—ideal for interfacing with high‑impedance sources such as antenna feeds or photodiodes.

Basic Topology

The classic CG amplifier consists of a single IGFET (e.g., an N‑channel MOSFET) with the following key elements:

• Gate (G): DC bias point (often AC‑coupled to ground).
• Source (S): Connected to the input via a small source‑degeneration resistor, setting the transconductance.
• Drain (D): Provides the output; a load resistor (R_L) is placed to ground or to the next stage.

Key Performance Metrics

• Voltage Gain (A_v) ≈ g_m·R_L. With g_m ≈ 40 mS (typical for a 2N7000 at 10 mA) and R_L = 10 kΩ, A_v ≈ 400.
• Input Impedance (Z_in) ≈ 1/g_m ≈ 25 Ω—substantially lower than a common‑source stage.
• Output Impedance (Z_out) ≈ r_o + (1/g_m) ≈ several kΩ, suitable for driving resistive loads.
• Bandwidth limited by the parasitic capacitances C_gd and C_gs; the Miller effect is minimized because the gate is the reference node.

Advantages & Trade‑Offs

• Low input impedance allows direct coupling to high‑impedance sensors.
• Near‑unity voltage gain preserves signal amplitude.
• Excellent frequency response due to reduced Miller capacitance.
• Lower output impedance than a common‑source stage, but higher than a common‑drain.
• Requires precise gate biasing; variations in V_GS can shift the operating point.

Design Considerations

1. Biasing: Use a stable bias network or a voltage‑divider with high‑value resistors to fix V_GS while minimizing loading.
2. Source Degeneration: A small source resistor (R_S ≈ 10 Ω) linearizes the stage and provides negative feedback without significantly raising Z_in.
3. Parasitic Capacitances: Keep device layout compact; use high‑speed layout techniques to reduce C_gd and C_gs.
4. Power Supply Rejection: Employ filtering capacitors at the gate bias point to suppress supply noise.
5. Thermal Management: Ensure adequate heat sinking for high‑current operation; use thermal‑resistance‑aware layout.

Typical Applications

• RF front‑ends for wireless transceivers where a low‑impedance driver is needed.
• Analog-to-digital converter (ADC) input stages to present a low‑impedance load.
• Instrumentation amplifiers where the CG stage provides a high‑bandwidth buffer.
• Audio pre‑amplifiers for balanced line drivers.

Further Reading

For a deeper dive, consult the Wikipedia entry on MOSFETs and the IEEE Standard 1000 on MOSFET parameters. Experimental data from the TI 7612 datasheet illustrate real‑world g_m and gain figures at RF frequencies.