Your First VHDL Program: A Step‑by‑Step Hello World Tutorial
When you learn a new language, printing a simple message is a classic sanity check. Mastering the output of “Hello World!” confirms that your environment is set up correctly and gives you a glimpse of the language’s core syntax.
VHDL is a hardware description language, not a traditional software language, so you might wonder how it can display text. The trick is that VHDL code is executed inside a simulator, which can emulate a digital circuit and output diagnostic messages to your screen. This tutorial focuses exclusively on the language, not on FPGA or ASIC hardware.
This article is part of the Basic VHDL Tutorials series.
Think of VHDL as a parallel programming language: you describe how a circuit behaves, and a simulator runs that description in a virtual environment. Within that environment, you can easily produce console output, making “Hello World!” an ideal starting point.
How to install a VHDL simulator and editor for free
Exercise
This video tutorial walks you through creating your very first VHDL program:
The final code we produced:
entity T01_HelloWorldTb is
end entity;
architecture sim of T01_HelloWorldTb is
begin
process is
begin
report "Hello World!";
wait;
end process;
end architecture;
The simulator console output after pressing the run button in ModelSim:
VSIM 2> run # ** Note: Hello World! # Time: 0 ns Iteration: 0 Instance: /t01_helloworld
Analysis
At the very beginning, we declare an entity. The entity defines the interface of a module—its inputs and outputs. For a simple testbench that only prints a message, no ports are required, so the entity is intentionally left empty.
Next, we specify the architecture, which represents the internal implementation of the module. The architecture is where the actual logic lives; a single entity can have multiple architectures, but that is an advanced feature we’ll cover later.
Inside the architecture, a process is defined. In VHDL, a process behaves like a thread, executing statements sequentially. Here, the process contains two statements:
report "Hello World!";– this sends the text to the simulator console.wait;– this suspends the process indefinitely, preventing the simulator from continuing further actions.
When we simulate the design in ModelSim, the console immediately displays the “Hello World!” message, confirming that the code is syntactically correct and that the simulator is functioning.

Takeaway
- In VHDL, a
processacts like a program thread. - The
reportstatement outputs text to the simulator console. - A
wait;statement pauses the process forever, useful for creating a simple testbench.
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