Mastering While Loops in VHDL: Dynamic Iteration Control

Building on our earlier exploration of for loops, this tutorial dives into the while loop—a powerful construct that lets you control iteration based on dynamic conditions rather than a predetermined range.

The while loop executes its body repeatedly as long as the specified condition remains true. This makes it ideal for scenarios where the number of iterations depends on runtime data or complex logic.

This post is part of the Basic VHDL Tutorials series.

Syntax

while <condition> loop
    -- loop body
end loop;

The <condition> must evaluate to a boolean value. It can be a simple comparison or a more elaborate expression. The condition is checked before each pass, ensuring the loop only continues when it remains true.

Condition Examples

• i < 10 – true while i is less than 10.
• i /= 10 – true while i is not equal to 10.
• i >= 0 and i < 2**8 – true for values from 0 up to 255.

Relational Operators

Logical Operators

Exercise

Watch the video tutorial below to see how a variable can drive a while loop in practice:

Sample Code

entity T05_WhileLoopTb is
end entity;

architecture sim of T05_WhileLoopTb is
begin

    process is
        variable i : integer := 0;
    begin

        while i < 10 loop
            report "i=" & integer'image(i);
            i := i + 2;
        end loop;
        wait;

    end process;

end architecture;

Simulator Output

VSIM 2> run
# ** Note: i=0
#    Time: 0 ns  Iteration: 0  Instance: /t05_whilelooptb
# ** Note: i=2
#    Time: 0 ns  Iteration: 0  Instance: /t05_whilelooptb
# ** Note: i=4
#    Time: 0 ns  Iteration: 0  Instance: /t05_whilelooptb
# ** Note: i=6
#    Time: 0 ns  Iteration: 0  Instance: /t05_whilelooptb
# ** Note: i=8
#    Time: 0 ns  Iteration: 0  Instance: /t05_whilelooptb

Analysis

We initialize i to 0 and use i < 10 as the loop guard. Because the loop increments i by 2 each cycle, the last value printed is 8. On the next pass, the condition evaluates to false (10 is not less than 10), and the loop exits. The subsequent wait; suspends the process indefinitely, a common pattern for testbenches.

Key Takeaways

• The while loop runs as long as its condition remains true.
• The condition is evaluated before each iteration.
• Variables can be declared inside a process and updated within the loop.

Take the Basic VHDL Quiz – part 1 or continue to the next tutorial.