Talk of configuring a base processor or adding custom extensions to resolve hardware‑software design tradeoffs in a system‑on‑chip (SoC) has long been a cornerstone of the RISC‑V community’s value proposition. Recent articles—such as A guide to accelerating applications with just‑right RISC‑V custo

During the four‑day electronica 2020, the Embedded Forum delivered a series of keynotes and technical presentations that covered the entire spectrum of embedded systems design and development. The program spanned from the essential tools and software that drive end‑to‑end product lifecycles, through

Xilinx’s recent acquisition of Falcon Computing Solutions expands software programmability and adaptive computing for developers, leveraging Falcon’s compiler to generate custom, high‑performance FPGA and SoC‑accelerated applications. Falcon Computing Solutions specializes in high‑level synthesis (H

Cartesiam has unveiled NanoEdge AI Studio V2, the first IDE that supports anomaly classification directly on all Arm Cortex‑M microcontrollers. Alongside the IDE, the company launched a web‑based platform that offers real‑world datasets for representative use cases, and announced a partnership with

Amazon Web Services (AWS) announced that Arm is moving the bulk of its electronic design automation (EDA) workloads to the cloud, a transition that could increase design and verification throughput by up to tenfold. Design engineers have increasingly turned to cloud platforms, a shift accelerated by

Electronic design automation leader Pulsic has released a groundbreaking plug‑in that brings real‑time chip layout previews directly into Cadence Virtuoso’s schematic editor. The tool, called Animate Preview, enables analog designers to see accurate physical representations of their circuits on the

Siemens Digital Industries has expanded its Veloce hardware‑assisted verification ecosystem with four new tools that streamline and accelerate SoC design validation. The complete solution—virtual verification platform, hardware emulation, and FPGA prototyping—provides a unified workflow that reduces

Cadence Design Systems today introduced its latest emulation and prototyping platforms, promising the fastest, highest‑performance pre‑silicon hardware debugging and software validation for billion‑gate SoC designs. With a unified compiler interface and common debug and testbench interfaces, the new

Katana Graph, a high‑performance graph analytics startup, has announced that its flagship Katana Graph Engine (KGE) has been fully optimized for Intel’s 3rd‑generation Xeon scalable processors and the accompanying Optane persistent memory platform. The upgrade delivers a near‑double speed increase f

AImotive, a leading automotive AI software and IP provider, announced that its aiWare3P neural‑network processor achieved up to 98 % sustained real‑time efficiency on Nextchip’s Apache5 imaging edge processor. This performance represents a 2‑ to 3‑fold improvement over comparable NPUs currently avai

In a recent CXO Cyience webinar, semiconductor veteran Wally Rhines outlined the industry’s post‑COVID recovery and projected sustained growth of silicon transistors through 2038. The semiconductor and electronic design automation (EDA) ecosystem is the invisible foundation of modern life—from lapto

Software tracing remains an essential technique for every embedded developer, especially when paired with advanced visualization. Most embedded systems exhibit repetitive, cyclical patterns. During debugging, the goal is to pinpoint deviations from this normal behavior—those anomalies that signal un

The open instruction set architecture (ISA) of RISC‑V offers unparalleled flexibility, enabling developers to design extensions that precisely fit their application requirements. While the base processor can be configured with standard extensions, the real advantage lies in creating new instructions

Facebook’s engineering team has designed and released a high‑precision time appliance, a key element of modern data‑center timing infrastructure. By creating the time card—a PCIe card that transforms any commodity server into a Stratum‑1 time source—and partnering with the Open Compute Project (OCP)

C++ remains a niche choice for embedded systems, yet it becomes the go‑to language when projects grow beyond the limits of plain C. For developers transitioning from C, understanding the subtle distinctions between C structures, C++ classes, and C++ structures is essential. This article demystifies

The electronics industry is demanding ever more levels of accuracy and temperature sensing is no exception. Many temperature sensing solutions exist, each with their benefits and drawbacks. Silicon temperature sensors, while being quite linear, have never offered the accuracy of other solut

Over the past decade, embedded software has grown from a few hundred thousand lines to more than 100 million in a typical vehicle. The shift to 32‑bit processors and abundant memory has unlocked unprecedented functionality—yet it has also amplified the risk of subtle bugs that threaten safety and se

For many years, the security of desktop computers has been a concern. Once a machine is connected to the Internet, there is intrinsically a possibility for some kind of attack. Such infiltrations might be to steal data, damage the system or change its operation in some way. Means of protect

In our previous article we explored how a well‑structured interface can separate low‑level driver details from application logic, boosting scalability and portability across hardware platforms. In this entry we dive into practical ADC driver implementations, focusing on the polling approach. We’ll c

Editors Note: Connected devices that form the backbone of the Internet of Things (IoT) expose a broad attack surface to malicious actors. Developers must adopt a comprehensive set of security practices to protect firmware integrity. This series, based on “IoT Penetration Testing Cookbook” by Aaron G